Design-Reuse

IntelliProp Announces NVMe Host Accelerator IP Core With User-Friendly Hardware Interface

IntelliProp, Inc., a leader in innovative Intellectual Property (IP) Cores and semiconductors for Data Storage applications, announced today the availability of a new, NVMe Host Accelerator IP Core, ...
Design-Reuse

Design and Implementation of SD Host Controller IP Core

This paper discusses a method to design an SD Host Controller IP Core that can be implemented on FPGAs. FPGAs are being widely deployed in various applications including industrial, commercial and ...
EDN

USB Host Controller with a Processor Interface

The SAF1760 is a Hi-Speed Universal Serial Bus (USB) host controller with a generic processor interface. It integrates one Enhanced Host Controller Interface (EHCI), one Transaction Translator (TT) ...
EDN

FPGA board has USB 2.0 host interface

Orange Tree Technologies announces ZestSC2, a high performance FPGA board that can be used stand-alone or connected by USB to a host computer. The board is aimed at data acquisition, and stand-alone ...
Embedded

Defining standard Debug Interface Socket requirements for OCP-Compliant multicore SoCs: Part 1

Enabling a robust on-chip debug capability is being recognized as animportant Design for Debug (DFD) capability for complex SoC and having DFDstandardization makes the Open Core Protocol (OCP) ...
Electronic Design

Chip Interfaces USB To SDIO

The VUB300 USB to SDIO bridge converts USB interfaces to SDIO host interfaces. The SDIO host function conforms to the SDIO Host specification with a generic USB wrapped interface to extend SDIO host ...