In our previous post Low Power LDO Design Techniques for Really Small Profile Applications, Part 1, we reviewed LDO design tradeoffs using an NMOS pass transistor. This design approach is proven good ...

For years—decades, in fact—the NMOS transistor world has been on cruise control. NMOS is naturally faster and its performance has scaled better than PMOS. PMOS has had a cost advantage. But lately, it ...

Quickly learn what the difference is between PMOS and NMOS transistors in their structure and operation, and how CMOS works with the two in combination. Siliwiz, a free, browser-based, ASIC layout ...

X-FAB has added three new low-noise transistors to its 180nm process node: a 1.8 V low-noise NMOS, a 3.3 V low-noise NMOS and a 3.3 V low-noise PMOS – all of which offer drastically reduced flicker ...

For many decades, progress in electronics has been driven by a gradual reduction in the size of silicon transistors (electronic switches). However, this scaling is becoming increasingly difficult and ...

This is the third installment in our CPU design series. In Part 1, we covered computer architecture and how a processor works at a high level. Part 2 explored the design and implementation of ...

A key challenge to the ultra-miniaturization of electronic systems is power management. As any EE knows, when overall system sizes shrink the amount of area available for energy storage and energy ...