EDN

System-on-chip (SoC) design is all about IP management

For most system-on-chip (SoC) designs, the most critical task is not RTL coding or even creating the chip architecture. Today, SoCs are designed primarily by assembling various silicon intellectual ...
Electronic Design

Trimmable Analog IP Blocks Come Fully Armed With Power Management

Innovative laser-trimming technology for Bluetooth and Wi-Fi SoCs brings total on-chip power management. A new weapon in the arsenal for designers of Bluetooth and Wi-Fi (802.11) system-on-a-chip (SoC ...
Semiconductor Engineering

IP Becoming More Complex, More Costly

Success in the semiconductor intellectual property (IP) market requires more than a good bit of RTL. New advances mandate a complete design, implementation, and verification team, which limits the ...
Electronic Design

Optimize SoC Design with a Network-on-Chip Strategy

How third-party interconnect IP saves time, lowers risk, and speeds completion. NoC is the predominant SoC interconnect strategy. NoC IP accommodates multiple interconnect protocols and data widths.
Semiconductor Engineering

Securing IP Integrity In Advanced SoC Design

In today’s complex system-on-chip (SoC) design flows, intellectual property (IP) blocks are everywhere—licensed from third parties, leveraged from internal libraries, or hand-crafted by expert teams.